NXP reader chip
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TDA8007BHL/C3

TDA8007BHL card is a cost-effective interface for dual smart card reader. The device is controlled by a parallel bus to meet ISO 7816, GSM 11-11, EMV4.2 and EMV 2000 standard all the requirements. Using the address register AD0, AD1, AD2 and AD3, through non-multiplexed 8 data bus can be addressed to the device. Can also be accessed via the multiplexer addressing TDA8007BHL / C3. Integrated ISO UART and out counter can easily use the device even in the absence of real time limit high baud rates. Since the device has a chip select function, the external input / output and interrupt feature which greatly simplifies the design of any number of the card reader. Since the device has special hardware ESD protection, short circuit protection, power failure protection function, which provides a high level of security for cards and readers. Integrated Set converter allows the supply voltage operating range of 2.7 V to 6 V.

 TDA8007BHL / C4 supports only non-multiplexed access mode, TDA8007BHL / C3 can support both multiplexed and non-multiplexed access mode.
 Features and Benefits
 By 8-bit parallel interface control and communications, compatible with non-multiplexed memory access, TDA8007BHL / C3 can also be addressed by multiplexing memory access
 Special ISO UART integrated parallel access input / output, automatic conventional treatment, variable baud rate than the programmed frequency by frequency or points, provides character-level error management for T = 0 and additional protection time register
 FIFO receive mode for 1-8 characters
 Receive mode and transmit parity error counter mode with automatic re-transmission function
 Dual VCC generation: 5 V ¡À 5%, 65 mA (maximum); 3 V ¡À 8%, 50 mA (max) or 1.8 V ¡À 10%, 30 mA (max); provide a controlled rise and fall Time
 Dual card clock (up to 10 MHz), has three times the sync frequency doubling (fXTAL, 1 / 2fXTAL, 1 / 4fXTAL and 1 / 8fXTAL)
 Under card card clock stop shutdown mode (high or low) or 1.25 MHz (internal oscillator)
 Can automatically activate or deactivate the sequence through a separate sequencer
 Supports asynchronous protocols T = 0 and T = 1, in line with: ISO 7816 standards and EMV4.2
 Multifunctional 24 out counter for processing the answer to reset (ATR) and latency
 Special primary time unit (ETU) counter for block protection time (BGT): T = 1 for 22, T = 0 for 16
 In receive mode the minimum delay between two characters:
 At T = 0 protocol for 11.8 ETU
 T = 1 protocol for 10.8 ETU
 Support synchronous cards
 Limit the short circuit current event (pin I / O1, I / O2, VCC1, VCC2, RST1 and RST2)
 Special circuitry eliminates spikes on the power on / off time
 For power on / off power supply monitor reset
 Boost converter (supply voltage range: 2.7 V to 6 V), frequency multiplier, triple or follower to meet the requirements of VCC and VDD
 Additional input / output pin is used to support the ISO UART another analog interface (pin I / OAUX)
 Additional external interrupt pins allow detection of signal level switch (pin INTAUX)
 Each card can be used alone as a result of the buffer parameter, you can achieve fast and efficient exchange between three cards
 Chip-select input allows the simultaneous use of multiple devices, support memory paging space
 Card terminal with enhanced ESD protection (C4x, C8x except): 6 kV (minimum)
 Provides software library can be easily integrated into applications
 When there is no activity, shutdown mode reduces power consumption

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